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march 2005 revision 5 1/28 operating from v cc = 3v to 5.5v rail to rail input/output speaker driver with 1 w output @ vcc = 5v, thd+n = 1%, f = 1khz, 8 ? load headset drivers with 160 mw output @ vcc = 5v, thd+n = 1%, f = 1khz, 32 ? load headset output is 30mw in stereo @ vcc = 3v thd+n < 0.5% max @ 20mw into 32 ? btl, 50hz < frequency < 20khz 32-step digital volume control from - 34.5db to +12db +6db power up volume and full standby 8 different output modes pop & click reduction circuitry low shutdown current (< 100na) thermal shutdown protection flip-chip package 18 x 300m bumps description the ts4851 is a low power audio amplifier that can drive either both a mono speaker or a stereo headset. to the speaker, it can deliver 400 mw (typ.) of continuous rms output power into an 8 ? load with a 1% thd+n value. to the headset driver, the amplifier can deliver 30 mw (typ.) per channel of continuous average power into a stereo 32 ? bridged-tied load with 0.5% thd+n @ 3.3v. this device features a 32-step digital volume control and 8 different output selections. the digital volume and output modes are controlled through a three-digit spi interface bus. pin connections (top view) applications mobile phones order codes j = flip chip package - only available in tape & reel (jt)) pin out (top view) ts485ijt - flip-chip ts485eijt - lead free flip-chip bypass r out< - r out + gnd l out + l out - r in l in vcc data vcc nc phone in spkr out+ spkr out - enb gnd clk bypass r out< - r out + gnd l out + l out - r in l in vcc data vcc nc phone in spkr out+ spkr out - enb gnd clk part number temperature range package packaging marking ts4851ijt -40, +85c flip-chip tape & reel a51 TS4851EIJT lead free flip-chip a51 ts4851 mono 1w speaker and stereo 160mw headset btl drivers with digital volume control
ts4851 application information 2/28 1 application information figure 1: application information for a typical application table 1. external component description component functional description c in this is the input coupling capacitor. it blocks the dc voltage at, and couples the input signal to the amplifier?s input terminals. cin also creates a highpass filter with the internal input impedance zin at fc =1/ (2 ixzinxcin). c s this is the supply bypass capacitor. it provides power supply filtering. c b this is the bypass pin capacitor. it provides half-supply filtering.
spi bus interface ts4851 3/28 2 spi bus interface 2.1 description of spi operation the serial data bits are organized into a field containing 8 bits of data as shown in table 3 . the data 0 to data 2 bits determine the output mode of the ts4851 as shown in table 2 . the data 3 to data 7 bits determine the gain level setting as illustrated by table 3 . for each spi transfer, the data bits are written to the data pin with the least significant bit (lsb) first. all serial data are sampled at the rising edge of the clk signal. once all the data bits have been sampled, enb transitions from logic-high to logic low to complete the spi sequence. all 8 bits must be received before any data latch can occur. any excess clk and data transitions will be ignored after the height rising clock edge has occurred. for any data sequence longer than 8 bits, only the first 8 bits will get loaded into the shift register and the rest of the bits will be disregarded. table 2. pin description pin functional description data this is the serial data input pin. clk this is the clock input pin. enb this is the spi enable pin active at high level. table 3. bit allocation data modes lsb data 0 mode 1 data 1 mode 2 data 2 mode 3 data 3 gain 1 data 4 gain 2 data 5 gain 3 data 6 gain 4 msb data 7 gain 5 table 4. output mode selection: g from -34.5db to +12db (by steps of 1.5db) output mode # data 2 data 1 data 0 spkerout 1 1) sd = shutdown mode, p = phone in input, r = rin input and l = lin input rout lout 0 0 0 0 sd sd sd 1 0 0 1 6dbxp sd sd 2 0 1 0 sd 0dbxp 0dbxp 30 1 1gx(r+l)sd sd 41 0 0 sdgxrgxl 51 0 1gx(r+l) +6dbxp sd sd 6 1 1 0 sd gxr+0dbxp gxl+0dbxp 7 1 1 1 6dbxp gxr+0dbxp gxl+0dbxp
ts4851 spi bus interface 4/28 table 5. volume control settings k : gain (db) data 7 data 6 data 5 data 4 data 3 -34.5 00000 -33.0 00001 -31.5 00010 -30.0 00011 -28.5 00100 -27.0 00101 -25.5 00110 -24.0 00111 -22.5 01000 -21.0 01001 -19.5 01010 -18.0 01011 -16.5 01100 -15.0 01101 -13.5 01110 -12.0 01111 -10.5 10000 -9.0 10001 -7.5 10010 -6.0 10011 -4.5 10100 -3.0 10101 -1.5 10110 0.0 10111 1.5 11000 3.0 11001 4.5 11010 6 11011 7.5 11100 9 11101 10.5 11110 12 11111
spi bus interface ts4851 5/28 figure 2: spi timing diagram
ts4851 absolute maximum ratings 6/28 3 absolute maximum ratings table 6. key parameters and their absolute maximum ratings symbol parameter value unit vcc supply voltage 1 1) all voltages values are measured with respect to the ground pin. 6v t oper operating free air temperature range -40 to + 85 c t stg storage temperature -65 to +150 c t j maximum junction temperature 150 c r thja flip chip thermal resistance junction to ambient 2 2) device is protected in case of over temperature by a thermal shutdown active @ 150c 200 c/w pd power dissipation internally limited esd human body model 2 kv esd machine model 100 v latch-up immunity 200 ma lead temperature (soldering, 10sec) lead temperature (soldering, 10sec) for lead-free version 250 260 c table 7. operating conditions symbol parameter value unit vcc supply voltage 3 to 5.5 v v phin maximum phone in input voltage g nd to v cc v vrin/vlin maximum rin & lin input voltage g nd to v cc v tsd thermal shut down temperature 150 c r thja flip chip thermal resistance junction to ambient 1 1) device is protected in case of over temperature by a thermal shutdown active @ 150c 90 c/w
electrical characteristics ts4851 7/28 4 electrical characteristics table 8. electrical characteristics at vcc = +5v, gnd = 0v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current output mode 7, vin = 0v, no load all other output modes, vin = 0v, no load 8 4.5 11 6.5 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) vin = 0v 5 50 mv vil ?logic low? input voltage 0 0.4 v vih ?logic high? input voltage 1.4 5 v po output power spkerout, rl = 8 ?, thd = 1%, f = 1khz rout & lout, rl = 32 ?, thd = 0.5%, f = 1khz 800 80 1000 120 mw thd + n total harmonic distortion + noise rout & lout, po = 80mw, f = 1khz, rl = 32 ? spkerout, po = 800mw, f = 1khz, rl = 8 ? rout & lout, po = 50mw, 20hz < f < 20khz, rl = 32 ? spkerout, po = 40mw, 20hz < f < 20khz, rl = 8 ? 0.5 1 0.5 1 % snr signal to noise ratio (a-weighted) 90 db psrr power supply rejection ratio 1 vripple = 200mv vpp, f = 217hz, input(s) terminated 10 ? ouput mode 1 ouput mode 2 ouput mode 3 (g=+12db) ouput mode 4 (g=+12db) ouput mode 5 (g=+12db) ouput mode 6, 7 (g=+12db) 1) dynamic measurements [20 x log(rms(vout)/rms(vripple)]. vripple is the superimposed sinus signal to vcc @ f = 217hz 70 70 55 57 52 56 db g digital gain range - rin & lin no load -34.5 +12 db digital gain stepsize 1.5 db stepsize g -22.5db g < -22.5db -0.5 -1 +0.5 +1 db phone in gain, no load btl gain from phone in to spkerout btl gain from phone in to rout & lout 6 0 db zin phone in input impedance 15 20 25 k ? zin rin & lin input impedance (all gain setting) 37.5 50 62.5 k ? tes enable stepup time - enb 20 ns teh enable hold time - enb 20 ns tel enable low time - enb 30 ns tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz
ts4851 electrical characteristics 8/28 table 9. electrical characteristics at vcc = +3v, gnd = 0v, tamb = 25c (unless otherwise specified) symbol parameter min. typ. max. unit i cc supply current output mode 7, vin = 0v,no load all other output modes, vin = 0v,no load 7.5 4.5 10 6.5 ma i standby standby current output mode 0 0.1 2 a voo output offset voltage (differential) vin = 0v 5 50 mv vil ?logic low? input voltage 0 0.4 v vih ?logic high? input voltage 1.4 5 v po output power spkerout, rl = 8 ?, thd = 1%, f = 1khz rout & lout, rl = 32 ?, thd = 0.5%, f = 1khz 300 20 340 30 mw thd + n total harmonic distortion + noise rout & lout, po = 20mw, f = 1khz, rl = 32 ? spkerout, po = 300mw, f = 1khz, rl = 8 ? rout & lout, po = 15mw, 20hz < f < 20khz, rl = 32 ? spkerout, po = 250mw, 20hz < f < 20khz, rl = 8 ? 0.5 1 0.5 1 % snr signal to noise ratio (a-weighted) 86 db psrr 1 power supply rejection ratio 2 vripple = 200mv vpp, f = 217hz, input(s) terminated 10 ? ouput mode 1 ouput mode 2 ouput mode 3 (g=+12db) ouput mode 4 (g=+12db) ouput mode 5 (g=+12db) ouput mode 6, 7 (g=+12db) 65 70 54 54 51 53 db g digital gain range - rin & lin no load -34.5 - +12 db digital gain stepsize 1.5 db stepsize error g -22.5db g < -22.5db -0.5 -1 +0.5 +1 db phone in gain, no load btl gain from phone in to spkerout btl gain from phone in to rout & lout 6 0 db zin phone in input impedance 1 15 20 25 k ? zin rin & lin input impedance (all gain setting) 1 37.5 50 62.5 k ? tes enable stepup time - enb 20 ns teh enable hold time - enb 20 ns tel enable low time - enb 30 ns tds data setup time- data 20 ns tdh data hold time - data 20 ns tcs clock setup time - clk 20 ns tch clock logic high time - clk 50 ns tcl clock logic low time - clk 50 ns fclk clock frequency - clk dc 10 mhz 1) all psrr data limits are guaranted by evaluation desgin test. 2) dynamic measurements [20 x log(rms(vout)/rms(vripple)]. vripple is the superimposed sinus signal to vcc @ f = 217hz
electrical characteristics ts4851 9/28 note: in the graphs that follow, the abbreviations spkout = speaker output, and hdout = headphone output are used. all measurements made with cin = 220nf, cb = cs = 1f except in psrr condition where cs = 0. table 10. index of graphics description figure page thd + n vs. output power figures 3 to 12 page 10 to page 11 thd + n vs. frequency figures 13 to 22 page 11 to page 13 output power vs. power supply voltage figures 23 to 30 page 13 to page 14 psrr vs. frequency figures 31 to 40 page 14 to page 16 frequency response figures 41 to 44 page 16 signal to noise ratio vs. power supply voltage figures 45 to 48 page 17 crosstalk vs. frequency figures 49 to 50 page 18 -3 db lower cut off frequency vs. input capacitor figures 51 to 52 page 18 current consumption vs. power supply voltage figure 53 page 18 power dissipation vs. output power figures 54 to 57 page 18 to page 19 power derating curves figure 58 page 19 -3 db lower cut off frequency vs. gain setting figure 59 page 19
ts4851 electrical characteristics 10/28 figure 3: spkout thd+n vs. output power (output modes 1, 7) figure 4: spkout thd+n vs. output power (output modes 1, 7) figure 5: spkout thd+n vs. output power (output modes 1, 7) figure 6: hdout thd+n vs. output power (output mode 2) figure 7: hdout thd+n vs. output power (output mode 2) figure 8: spkout thd+n vs. output power (output mode 3, g=+12db) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 4 ? output mode 1, 7 bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 8 ? output mode 1, 7 bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 16 ? output mode 1, 7 bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 16 ? output mode 2 bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 32 ? output mode 2 bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 4 ? out. mode 3; g = +12db bw < 125 khz tamb = 25 c thd + n (%) output power (w)
electrical characteristics ts4851 11/28 figure 9: spkout thd+n vs. output power (output mode 3, g=+12db) figure 10: spkout thd+n vs. output power (output mode 3, g=+12db) figure 11: hdout thd+n vs. output power (output mode 4, g=+12db) figure 12: hdout thd+n vs. output power (output mode 4, g=+12db) figure 13: spkout thd+n vs. frequency (output modes 1, 7) figure 14: spkout thd+n vs. frequency (output modes 1, 7) 1e-3 0.01 0.1 1 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 8 ? out. mode 3; g = +12db bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 16 ? output mode 3 g = +12db bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 16 ? output mode 4 g = +12db bw < 125 khz tamb = 25 c thd + n (%) output power (w) 1e-3 0.01 0.1 0.01 0.1 1 10 vcc=5v f=20khz vcc=5v f=1khz vcc=3v f=20khz vcc=3v f=1khz rl = 32 ? output mode 4 g = +12db bw < 125 khz tamb = 25 c thd + n (%) output power (w) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=1.1w vcc=3v p=400mw rl = 4 ? output mode 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=800mw vcc=3v p=320mw rl = 8 ? output mode 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
ts4851 electrical characteristics 12/28 figure 15: spkout thd+n vs. frequency (output modes 1, 7) figure 16: hdout thd+n vs. frequency (output mode 2) figure 17: hdout thd+n vs. frequency (output mode 2) figure 18: spkout thd+n vs.frequency (output mode 3, g = +12 db) figure 19: spkout thd+n vs. frequency (output mode 3, g = +12 db) figure 20: spkout thd+n vs. frequency (output mode 3, g = +12 db) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=550mw vcc=3v p=150mw rl = 16 ? output mode 1, 7 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=220mw vcc=3v p=40mw rl = 16 ? output mode 2 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=140mw vcc=3v p=20mw rl = 32 ? output mode 2 bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=5v p=1.1w vcc=3v p=400mw rl = 4 ? output mode 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.1 1 10 vcc=5v p=800mw vcc=3v p=320mw rl = 8 ? output mode 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=550mw vcc=3v p=180mw rl = 16 ? output mode 3 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz)
electrical characteristics ts4851 13/28 figure 21: hdout thd+n vs. frequency (output mode 4, g = +12 db) figure 22: hdout thd+n vs. frequency (output mode 4, g = +12 db) figure 23: speaker output power vs. power supply voltage (output mode 1, 7) figure 24: speaker output power vs. power supply voltage (output mode 1, 7) figure 25: headphone output power vs. load resistor (output mode 2) figure 26: headphone output power vs. load resistor (output mode 2) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=220mw vcc=3v p=40mw rl = 16 ? output mode 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 100 1000 10000 0.01 0.1 1 10 vcc=5v p=140mw vcc=3v p=20mw rl = 32 ? output mode 4 g = +12db bw < 125khz tamb = 25 c thd + n (%) frequency (hz) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 f = 1khz output mode 1, 7 bw < 125khz tamb = 25 c 32 ? 16 ? 8 ? 4 ? output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 2.4 f = 1khz output mode 1, 7 bw < 125khz tamb = 25 c 32 ? 16 ? 8 ? 4 ? output power at 10% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 f = 1khz output mode 2 bw < 125khz tamb = 25 c 32 ? 16 ? 64 ? output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 f = 1khz output mode 2 bw < 125khz tamb = 25 c 32 ? 16 ? 64 ? output power at 10% thd + n (w) vcc (v)
ts4851 electrical characteristics 14/28 figure 27: speaker output power vs. power supply voltage (output mode 3) figure 28: speaker output power vs. power supply voltage (output mode 3) figure 29: headphone output power vs. load resistor (output mode 4) figure 30: headphone output power vs. load resistance (output mode 2) figure 31: spkout psrr vs. frequency (output modes 1, 7, input grounded) figure 32: hdout psrr vs. frequency (output mode 2, input grounded) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 f = 1khz output mode 3 bw < 125khz tamb = 25 c 32 ? 16 ? 8 ? 4 ? output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.0 0.4 0.8 1.2 1.6 2.0 2.4 f = 1khz output mode 3 bw < 125khz tamb = 25 c 32 ? 16 ? 8 ? 4 ? output power at 10% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 f = 1khz output mode 4 bw < 125khz tamb = 25 c 32 ? 16 ? 64 ? output power at 1% thd + n (w) vcc (v) 3.0 3.5 4.0 4.5 5.0 5.5 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 f = 1khz output mode 4 bw < 125khz tamb = 25 c 32 ? 16 ? 64 ? output power at 10% thd + n (w) vcc (v) 100 1000 10000 100000 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 vcc=3v vcc=5v output mode 1, 7 rl = 8 ? vripple = 0.2vpp tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 0 vcc = 3v & 5v output mode 2 rl = 32 ? vripple = 0.2vpp tamb = 25 c psrr (db) frequency (hz)
electrical characteristics ts4851 15/28 figure 33: spkout psrr vs. frequency (output mode 3, inputs grounded) figure 34: spkout psrr vs. frequency (output mode 3, inputs grounded) figure 35: hdout psrr vs. frequency (output mode 4, inputs grounded) figure 36: hdout psrr vs. frequency (output mode 4, inputs grounded) figure 37: spkout psrr vs. frequency (output mode 5, inputs grounded) figure 38: spkout psrr vs. frequency (output mode 5, inputs grounded) 100 1000 10000 100000 -90 -80 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+9db g=+6db g=+12db output mode 3 vcc = +5v rl = 8 ? vripple = 0.2vpp tamb = 25 psrr (db) frequency (hz) 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 3 vcc = +3v rl = 8 ? vripple=0.2vpp tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -80 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 4 vcc = +5v rl = 32 ? vripple=0.2vpp tamb = 25 c psrr (db) frequency (hz) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 4 vcc = +3v rl = 32 ? vripple=0.2vpp tamb = 25 c psrr (hz) frequency (hz) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 5 vcc = +5v rl = 8 ? vripple=0.2vpp tamb = 25 c psrr (hz) frequency (hz) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 5 vcc = +3v rl = 8 ? vripple=0.2vpp tamb = 25 c psrr (hz) frequency (hz)
ts4851 electrical characteristics 16/28 figure 39: hdout psrr vs. frequency (output modes 6, 7, inputs grounded) figure 40: hdout psrr vs. freq., (output modes 6, 7, inputs grounded) figure 41: spkout frequency response (output mode 1, 7) figure 42: hdout frequency response (output mode 2) figure 43: spkout frequency response (output mode 3) figure 44: hdout frequency response (output mode 4) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 6, 7 vcc = +5v rl = 32 ? vripple=0.2vpp tamb = 25 c psrr (hz) frequency (hz) 100 1000 10000 100000 -70 -60 -50 -40 -30 -20 -10 0 g=-34.5db g=-12db g=0db g=+6db g=+9db g=+12db output mode 6, 7 vcc = +3v rl = 32 ? vripple=0.2vpp tamb = 25 c psrr (hz) frequency (hz) 100 1000 10000 0 2 4 6 20 output mode 1, 7 rl = 8 ? cin = 220 nf bw < 125 khz tamb = 25 c vcc=3v vcc=5v output level (db) frequency (hz) 100 1000 10000 -6 -4 -2 0 20 output mode 2 rl = 32 ? cin = 220 nf bw < 125 khz tamb = 25 c vcc=3v vcc=5v output level (db) frequency (hz) 100 1000 10000 0 2 4 6 8 10 12 20 vcc=5v output mode 3 rl = 8 ? g = +12db cin = 220 nf bw < 125 khz tamb = 25 c vcc=3v output level (db) frequency (hz) 100 1000 10000 0 2 4 6 8 10 12 20 vcc=5v output mode 4 rl = 32 ? g = +12db cin = 220 nf bw < 125 khz tamb = 25 c vcc=3v output level (db) frequency (hz)
electrical characteristics ts4851 17/28 figure 45: spkout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz figure 46: spkout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz figure 47: hdout snr vs. power supply voltage, unweighted filter, bw = 20 hz to 20 khz figure 48: hdout snr vs. power supply voltage, weighted filter a, bw = 20 hz to 20 khz 1234567 76 78 80 82 84 86 88 90 92 94 96 98 100 g=+12db vcc=3v vcc=5v rl = 8 ? unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 86 88 90 92 94 96 98 100 102 104 g=+12db vcc=3v vcc=5v rl = 8 ? weighted filter type a thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 76 78 80 82 84 86 88 90 92 94 96 98 100 g=+12db vcc=3v vcc=5v rl = 32 ? unweighted filter (20hz to 20khz) thd + n < 0.7% tamb = 25 c snr (db) output mode 1234567 86 88 90 92 94 96 98 100 102 104 g=+12db vcc=3v vcc=5v rl = 32 ? weighted filter type a thd + n < 0.7% tamb = 25 c snr (db) output mode
ts4851 electrical characteristics 18/28 figure 49: crosstalk vs. frequency (output mode 4) figure 50: crosstalk vs. frequency (output mode 4) figure 51: -3 db lower cut off frequency vs. input capacitor figure 52: -3 db lower cut off frequency vs. input capacitance figure 53: current consumption vs. power supply voltage figure 54: power dissipation vs. output power (speaker output) 100 1000 10000 -80 -60 -40 -20 0 20 lout -> rout rout -> lout output mode 4 vcc = 5v rl = 32 ? g = +12db pout = 100mw bw < 125khz tamb = 25 c crosstalk level (db) frequency (hz) 100 1000 10000 -80 -60 -40 -20 0 lout -> rout rout -> lout output mode 4 vcc = 3v rl = 32 ? g = +12db pout = 20mw bw < 125khz tamb = 25 c crosstalk level (db) frequency (hz) 0.1 1 10 100 minimum input impedance maximum input impedance typical input impedance phone in input tamb=25 c lower -3db cut off frequency (hz) input capacitor ( f) 0.1 1 1 10 minimum input impedance maximum input impedance typical input impedance rin & lin inputs all gain setting tamb=25 c lower -3db cut off frequency (hz) input capacitor ( f) 012345 0 1 2 3 4 5 6 7 8 9 10 no loads tamb = 25 c reset state mode 1, 3, 5 mode 2, 4, 6 mode 7 icc (ma) vcc (v) 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 rl=16 ? rl=8 ? vcc=5v f=1khz thd+n<1% rl=4 ? power dissipation (w) output power (w)
electrical characteristics ts4851 19/28 figure 55: power dissipation vs. output power (speaker output) figure 56: power dissipation vs. output power (headphone output, one channel) figure 57: power dissipation vs. output power (headphone output one channel) figure 58: power derating curves figure 59: -3 db lower cut off frequency vs. gain setting (output modes 3, 4, 5, 6, 7) table 11. output noise (all inputs grounded) 0.0 0.1 0.2 0.3 0.4 0.5 0.0 0.1 0.2 0.3 0.4 0.5 rl=4 ? rl=8 ? vcc=3v f=1khz thd+n<1% rl=16 ? power dissipation (w) output power (w) 0.00 0.05 0.10 0.15 0.20 0.25 0.0 0.1 0.2 0.3 0.4 rl=16 ? rl=32 ? vcc=5v f=1khz thd+n<1% power dissipation (w) output power (w) 0 10203040506070 0 20 40 60 80 100 120 rl=32 ? vcc=3v f=1khz thd+n<1% rl=16 ? power dissipation (mw) output power (mw) outp ut mode unweighted filter from 3v to 5v weighted filter (a) from 3v to 5v 123 vrms 20 vrms 220 vrms 17 vrms 370 vrms 60 vrms 453 vrms 45 vrms 579 vrms 67 vrms 660 vrms 51 vrms -20 0 1 10 100 cin=1 f cin=470nf cin=220nf cin=100nf rin & lin inputs input impedance is nominal tamb=25 c 12 -34.5 lower -3db cut off frequency (hz) gain setting (db) 0 25 50 75 100 125 150 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 no heat sink heat sink surface = 125mm 2 flip-chip package power dissipation (w) ambiant temperature ( c)
ts4851 application information 20/28 5 application information 5.1 btl configuration principles the ts4851 integrates 3 monolithic power amplifier having btl output. btl (bridge tied load) means that each end of the load is connected to two single-ended output amplifiers. thus, we have: single ended output 1 = vout1 = vout (v) single ended output 2 = vout2 = -vout (v) and vout1 - vout2 = 2vout (v) the output power is: for the same power supply voltage, the output power in btl configuration is four times higher than the output power in single ended configuration. 5.2 power dissipation and efficiency hypotheses: voltage and current in the load are sinusoidal (vout and iout). supply voltage is a pure dc source (vcc). regarding the load we have: and and then, the average current delivered by the supply voltage is: the power delivered by the supply voltage is: psupply = vcc icc avg (w) then, the power dissipated by each amplifier is pdiss = psupply - pout (w) ) w ( r ) vout 2 ( pout l 2 rms = v out = v peak sin t (v) i out = v out r l ---------------- - (a) p out = v peak 2 2r l ---------------------- ( w ) i cc avg = 2 v peak r l ------------------- - (a) ) w ( p p r v 2 2 p out out l cc diss ? =
application information ts4851 21/28 and the maximum value is obtained when: and its value is: note: this maximum value is depends only on power supply voltage and load values. the efficiency is the ratio between the output power and the power supply: the maximum theoretical value is reached when vpeak = vcc, so: the ts4851 has three independent power amplifiers. each amplifier produces heat due to its power dissipation. therefore, the maximum die temperature is the sum of each amplifier?s maximum power dissipation. it is calculated as follows: p diss speaker = power dissipation due to the speaker power amplifier. p diss head = power dissipation due to the headphone power amplifier to t a l p diss = p diss speaker + p diss head1 + p diss head2 (w) in most cases, p diss head1 = p diss head2 , giving: to t a l p diss = p diss speaker + 2p diss head (w) the following graph ( figure 60 ) shows an example of the previous formula, with vcc set to +5v, r load speaker set to 8 ? and r load headphone set to 16 ? . figure 60: example of total power dissipation vs. speaker and headphone output power ? pdiss ? p out --------------------- - = 0 ) w ( r vcc 2 max pdiss l 2 2 = = p out psupply ----------------------- - = v peak 4v cc ----------------------- 4 ---- - = 78.5% [] ) w ( p 2 p r p 2 r p v 2 2 totalp head out speaker out head l head out speaker l speaker out cc diss + ? ? ? ? ? ? ? ? ? + =
ts4851 application information 22/28 5.3 low frequency response in low frequency region, the effect of cin starts. cin with zin forms a high pass filter with a -3db cut off frequency. zin is the input impedance of the corresponding input: 20k ? for phone in ihf input 50k ? for the 3 other inputs note: for all inputs, the impedance value remains constant for all gain settings. this means that the lower cut-off frequency doesn?t change with gain setting. note also that 20k ? and 50k ? are typical values and there are tolerances around these values (see electrical characteristics on page 7). in figures 39 to 41 , you could easily establish the cin value for a -3db cut-off frequency required. 5.4 decoupling of the circuit two capacitors are needed to bypass properly the ts4851, a power supply bypass capacitor cs and a bias voltage bypass capacitor cb. cs has especially an influence on the thd+n in high frequency (above 7khz) and indirectly on the power supply disturbances. with 1f, you could expect similar thd+n performances like shown in the datasheet. if cs is lower than 1f, thd+n increases in high frequency and disturbances on the power supply rail are less filtered. to the contrary, if cs is higher than 1f, those disturbances on the power supply rail are more filtered. cb has an influence on thd+n in lower frequency, but its value is critical on the final result of psrr with input grounded in lower frequency: if cb is lower than 1f, thd+n increases at lower frequencies and the psrr worsens upwards. if cb is higher than 1f, the benefit on thd+n and psrr in the lower frequency range is small. 5.5 startup time when the ts4851 is controlled to switch from the full standby mode (output mode 0) to another output mode, a delay is necessary to stabilize the dc bias. this delay depends on the cb value and can be calculated by the following formulas. typical startup time = 0.0175 x cb (s) max. startup time = 0.025 x cb (s) (cb is in f in these formulas) these formulas assume that the cb voltage is equal to 0v. if the cb voltage is not equal to 0v, the startup time will be always lower. the startup time is the delay between the negative edge of enable input (see description of spi operation on page 3) and the power on of the output amplifiers. note: when the ts4851 is set in full standby mode, cb is discharged through an internal switch.. the time to reach 0v of cb voltage is about ms. ) hz ( cin zin 2 1 f cl =
application information ts4851 23/28 5.6 pop and click performance the ts4851 has internal pop and click reduction circuitry. the performance of this circuitry is closely linked with the value of the input capacitor cin and the bias voltage bypass capacitor cb. the value of cin is due to the lower cut-off frequency value requested. the value of cb is due to thd+n and psrr requested always in lower frequency. the ts4851 is optimized to have a low pop and click in the typical schematic configuration (see page 2 ). note: the value of cs is not an important consideration as regards pop and click. 5.7 notes on psrr measurement what is the psrr? the psrr is the power supply rejection ratio. the psrr of a device, is the ratio between a power supply disturbance and the result on the output. we can say that the psrr is the ability of a device to minimize the impact of power supply disturbances to the output. how we measure the psrr? the pssr was measured according to the schematic shown in figure 61 . figure 61: psrr measurement schematic principles of operation the dc voltage supply (vcc) is fixed. the ac sinusoidal ripple voltage (vripple) is fixed. no bypass capacitor cs is used. the psrr value for each frequency is: rms is a rms selective measurement. 5.8 power-on reset when power is applied to vdd, an internal power on reset holds the ts4851 in a reset state until the supply voltage reached its nominal value. the power on reset has a typical threshold at 1.8v. ) db ( rms rms log 20 psrr ) vripple ( ) output ( ? ? ? ? ? ? ? ? =
ts4851 package information 24/28 6 package information flip-chip - 18 bumps: ts4851jt pin out (top view) marking (top view): the following markings are present on the topside of the flip-chip: the st logo. the part number: a51. a 3-digit date code: yww. a dot marking the location of pin1a. note: the solder bumps are on the underside. r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - cl k gnd bypass 1 5 4 3 2 7 6 ae d c b r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - cl k gnd bypass 1 5 4 3 2 7 6 ae d c b a51 yww a51 yww e symbol for lead-free
package information ts4851 25/28 ts4851 footprint recommendation package mechanical data pad in cu 18m thickness with flash niau (6m, 0.15m) 150m min. 433m 250m 866m =250m =400m 75m min 100m max. track non solder mask opening pad in cu 18m thickness with flash niau (6m, 0.15m) 150m min. 433m 250m 866m =250m =400m 75m min 100m max. track non solder mask opening 750um 500um 335um 354um 866um 866um 2440um 2170um symmetry axis symmetry axis 600um die size: 2170 m x 2440 m 30 m die height (including bumps): 600 m 30 m bumps diameter: 315 m 50 m bumps height: 250 m 40 m pitch: 500 m 10 m
ts4851 daisy chain samples 26/28 7 daisy chain samples a daisy chain sample is a ?dummy? silicon chip that can be used to test your flip-chip soldering process and connection continuity. the daisy chain sample features paired connections between bumps, as shown in the schematic below. on your pcb layout, you should design the bump connections such that they are complementary to the above schema (meaning that different pairs of bumps are connected on the pcb side). in this way, by simply connecting an ohmmeter between pin 1a and pin 5a, you can test the continuity of your soldering process. the order code for daisy chain samples is given below. order code for daisy chain samples figure 62: daisy chain sample mechanical data r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass r out- gnd r out + l out - l out + r in vcc data l in vcc nc enb phone in spkr out + spkr out - clk gnd bypass 2.44 mm 2.17 mm ae d c b 1 5 4 3 2 7 6 ae d c b 1 5 4 3 2 7 6 part number temperature range package marking j tsdc02ijt -40, +85c ? dc2
tape & reel specification ts4851 27/28 8 tape & reel specification device orientation the devices are oriented in the carrier pocket with pin number 1a adjacent to the sprocket holes. figure 63: top view of tape and reel a 1 a 1 user direction of feed a 1 a 1 user direction of feed
ts4851 revision history 28/28 9 revision history date revision description of changes 01 july 2002 1 first release 01 april 2003 2 curves inserted in the document 01 april 2004 3 curves updated in the document 01 jan. 2005 4 leadfree codification added in the document 01 march 2005 5 realignment of curve data in the document i nf ormat io n fu rnish ed is bel ieve d to b e accura te a nd rel iab le. h owe ver, st micro ele ctro nics assu mes no resp onsi bil it y f or th e co nsequences of u se o f su ch i nf ormat io n n or for any infrin geme nt of pa te nts or ot her righ ts of t hird pa rti es w hich may re sult f rom it s use . no lice nse i s gra nted by implication or otherwise under any patent or patent rights of stmicroelectronics. specifications mentioned in this publicati on are su bje ct to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics prod u cts are no t au th orize d fo r u se as critical co mpon ents in li fe su ppo rt de vices or systems witho ut e xpress wri tten a ppro val of stmi croel ect ro ni cs. t he st log o is a regi ste red t rade mark of st microe lect ron ics al l ot her na mes are t he pro pert y of t he ir respe cti ve own ers ? 200 5 stmicroel ectronics - all rights reserve d stmi croel ectroni cs gro up o f compa nie s au stra lia - bel giu m - brazi l - c ana da - chi na - czech r epu bli c - finl and - france - germany - ho ng kon g - ind ia - isra el - ital y - j a p a n - mal aysia - mal ta - moro cco - si nga pore - spa in - swed en - switzerl and - united kingdo m - un ited states of america www.st.com

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